A High-Speed CMOS Comparator for Use in an ADC
نویسنده
چکیده
..-htracf —A high-speed CMOS comparator has been designed and fabricated using a standard 3pm process. A dynamic latch preceded by an offset-cancelled amplifier is used to obtain a response time of 43 ns. The offset-cancelled amplifier reduces the input-referred offset so that medium-resolution analog-to-digital converters (ADC’S) can be built with this comparator. The use of pipefining within the comparator enables the offset cancellation to be done as the dynamic latch is enabled. Fhudly, power and area are optimafly distributed within the amplifier to minimize response time.
منابع مشابه
A 12 bit 76MS/s SAR ADC with a Capacitor Merged Technique in 0.18µm CMOS Technology
A new high-resolution and high-speed fully differential Successive Approximation Register (SAR) Analog to Digital Converter (ADC) based on Capacitor Merged Technique is presented in this paper. The main purposes of the proposed idea are to achieve high-resolution and high-speed SAR ADC simultaneously as well. It is noteworthy that, exerting the suggested method the total capacitance and the rat...
متن کاملDesign of a 45nm TIQ Comparator for High Speed and Low Power 4-Bit Flash ADC
The continued speed improvement of serial links and appearance of new communication technologies, such as ultra-wideband (UWB), have introduced increasing demands on the speed and power specifications of high-speed low-tomedium resolution analog-to-digital converters (ADCs).This paper presents the design of high speed and ultra low power comparator of a 4-bit ADC. The comparator used is Thresho...
متن کاملA 6-bit, 1-GHz Flash ADC in 0.35μm CMOS
+ Katholieke Universiteit Leuven, Kasteelpark Arenberg 10, B-3001 Heverlee, [email protected] . Abstract The design plan and measurement results of a very high-speed 6 bit CMOS Flash ADC converter are presented. The very high acquisition speed is obtained by improved comparator design. At these high frequencies power-efficient error correction logic is necessary. Measurements show th...
متن کاملA High-speed Cmos Current Comparator Suitable for Algorithmic Analog-to-digital Converters
This paper introduces a high-speed high resolution CMOS current comparator which is used in an algorithmic Analog-to-Digital Converter (ADC) and implemented with a 0.6 μm standard CMOS process. Circuit occupies 170 x 80μm2. Proposed circuit performs comparison over a precision of 10bit at a 100MHz clock within the 0-250 μA input current range. Power consumption is less than 500 μA.
متن کاملA Tiq Based Cmos Flash A/d Converter for System-on-chip Applications
The analog-to-digital converter (ADC) is an essential part of system-on-chip (SoC) products because it bridges the gap between the analog physical world and the digital logical world. In the digital domain, low power and low voltage requirements are becoming more important issues as the channel length of MOSFET shrinks below 0.25 sub-micron values. Moreover, SoC trends force ADCs to be integrat...
متن کامل